1. Field of the Invention
The instant invention relates to a process for fabricating a bipolar junction transistor utilizing polysilicon base and emitter regions. More particularly, the instant invention relates to a process for fabricating a bipolar junction transistor having a base region of narrow width, an abrupt base-collector junction and, preferably, an abrupt base-emitter junction, also.
2. Technical Considerations and Prior Art
Bipolar junction transistors are well known semiconductor devices which are widely used, e.g., as high-speed switches in integrated logic circuits and for processing microwave signals. The term "bipolar" is utilized because charge carriers of both positive and negative polarities participate in the operation of the transistors. Typically, a bipolar transistor includes a collector region, a base region and an emitter region. In accordance with the type of bipolar transistor under consideration in this application, the collector and emitter regions are made of n-type semiconductor material, while the base region is made of p-type semiconductor material. Generally the base region is formed by doping silicon with boron and diffusing the boron through the base region while the collector and emitter regions are doped with arsenic or phosphorus which are diffused therethrough. The regions are stacked upon one another with the base region disposed between the collector and emitter to form what is generally referred to as a npn transistor. By applying a positive potential to the base with respect to the emitter, the collector current can be switched on. By controlling the dimensions and other parameters of the regions, the collector current can exceed the base current by an order of magnitude or two which increase is known as "gain".
In order to achieve high switching speeds and gain, it is important to have a "narrow" or thin base so as to reduce the transit time for an electron injected by the emitter to pass through the base and so that virtually all the electrons injected by the emitter are transported across the base to the collector.
In order to minimize the base width, a great deal of effort has been expended to control doping concentrations and diffusing processes. In recent years, this control has been effected by various ion-implantation processes and by computer-controlled diffusion furnaces.
As a general practice, the boron-doped base region of an npn bipolar transistor is obtained by diffusion and must be annealed to relieve the implant damage and to activate the acceptors. This results in diffusion profile characteristics which make it difficult to maintain an abrupt base-collector junction and a well-defined, and controlled, base thickness. Thermal annealing is still necessary when the boron atoms have been implanted by ion implantation.
In accordance with one approach for producing very narrow base width, ultra-high-speed bipolar transistors, molecular beam epitaxy is utilized wherein a base region formed of boron-doped polysilicon is grown without utilizing diffusion steps. Such an approach is disclosed in the article "An Uncompensated Silicon Bipolar Junction Transistor Fabricating Using Molecular Beam Epitaxy" by Swartz et al., which appears in the IEEE Electron Device Letters, Vol. EDL-2, No. 11, November 1981. However, this process is done at 850.degree. C. which can cause diffusion at junctions, thus reducing switching speed and gain. Moreover, this appears to be a time-consuming operation, and the equipment for performing molecular beam epitaxy is very expensive.
With the current technology, it is preferable to utilize standard polysilicon deposition techniques, since the facilities for polysilicon deposition are widely available in the industry.
The prior art includes a number of publications disclosing techniques for enhancing transistors fabricated by depositing polysilicon. Articles by Graul et al., "High Performance Transistors with Arsenic-Implanted Polysil Emitters", IEEE Journal of Solid State Circuits, SC-11, p. 491, August 1976 and Ning et al., "Effect of Emitter Contact on Current Gain of Silicon Bipolar Devices", IEEE Trans. Electron Devices. Vol. ED-27, pp. 2051-2055, 1980, both consider processes to improve the emitter region of a bipolar junction transistor by depositing polysilicon into the emitter contact and then implanting the polysilicon with arsenic. This technique provides improved gain, higher breakdown voltage and lower base-emitter junction capacitance. The structure disclosed in these articles is advantageous because there is less base-doping impurity in the emitter than in the conventional double-diffused process. Moreover, the base-emitter junction is very abrupt, and the emitter can be very small.
Similar bipolar devices have been reported by Sullivan et al., "High Performance Bipolar Transistors in a CMOS Process", IEEE Trans. on Electron Devices. ED-29, pp. 1679-80, October 1982.
In addition, there is another Ning et al. publication, "Self-Aligned Bipolar Transistors for High Performance and Low-Power-Delay VLSI", IEEE Trans. Electron Devices, Vol. ED-28, Page 1010-1013, 1981, which describes a bipolar junction transistor wherein an arsenic-implanted polysilicon emitter is used as described in the two previously mentioned articles, with the addition that boron-doped polysilicon is provided as a diffusion source to fabricate a self-aligned p.sup.+ extrinsic base region around the lightly boron-doped, single-crystal silicon intrinsic base region which is directly under the emitter.
Jiang et al., "The Activation Effect of CW Laser Irradiation on Bipolar Transistors with Polysilicon Emitter Regions", Extended Abstracts, Vol. 81-2, Page 1004, The Electrochemical Society, Fall Meeting, Denver, Colo., 1980, and Jiang, "A New Type of Bipolar Logic IC with Polysilicon Emitter Region", Electronic Science and Technology (Chinese), Page 7, Number 7, 1980, describe a technique for making a polysilicon emitter region bipolar transistor where doped polysilicon is deposited at low temperatures so that a very abrupt base-emitter junction is formed with no inter-diffusion. In an emitter, it is advantageous to have the highest possible doping of electrically-active donors. Phosphorus is better than arsenic in this respect, because generally a higher active donor concentration can be achieved with phosphorus since arsenic tends to cluster. However, in recent years, most bipolar junction transistor processes have shifted to arsenic-doped emitters because more abrupt junctions can be formed since the diffusion coefficient of arsenic is much lower than the diffusion coefficient of phosphorus. The in-situ phosphorus-doped polysilicon emitter described by Jiang et al., has the best of both, because the phosphorus-doped polysilicon can be deposited at low temperature to form an abrupt junction. The laser irradiation used by Jiang et al. activates the phosphorus donors but is sufficiently brief that no diffusion occurs. In-situ doping of the polysilicon during low temperature deposition produces a more abrupt junction than ion implantation since there is a "tail" in the concentration of phosphorus versus depth when it is implanted into silicon.
Gat et al., "CW Laser Anneal of Polycrystalline and Silicon; Crystalline Structure, Electrical Properties", Applied Physics Letters, Vol. 33, Page 775, 1978, and "CW Laser Annealing of Ion Implanted Single Crystal Silicon", PhD Thesis, Chapter 3, Page 52-88, Stanford University, October, 1979, disclose work on laser annealing of polysilicon directed toward growth of large, single-crystal grains and epitaxial regrowth of polycrystalline silicon from a single crystal seed. Since the polysilicon emitter in a polysilicon emitter region transistor is deposited directly on a single-crystal base region, it is quite possible that a carefully controlled thermal pulse anneal will result in epitaxial crystallization of the emitter so that it becomes single crystal silicon. Epitaxial crystallization of the emitter may, however, be undesirable since the higher gain exhibited by polysilicon emitter transistors apparently is due to a low hole recombination lifetime in the emitter due to the presence of the grain boundaries in the polysilicon.
U.S. Pat. Nos. 4,272,880; 4,270,960; and 4,269,631 disclose processes for enhancing transistors utilizing polysilicon layers. However, none of these patents, nor the aforementioned articles, fully develop the possibilities for achieving higher switching speeds and gain for bipolar junction transistors by utilizing a recrystallized polysilicon layer for the base region.